1. Field of the Invention
This invention relates to a liquid crystal display fabricating method thereof, and more particularly to a liquid crystal display device with a lowermost layer metal in a bus line having a three-layer structure.
2. Description of the Background Art
Generally, a liquid crystal display (LCD) controls a light transmittance using an electric field to display a picture. To this end, the LCD includes a liquid crystal panel having liquid crystal cells arranged in a matrix type, and a driving circuit for driving the liquid crystal panel. The liquid crystal panel is provided with pixel electrodes for applying an electric field to each liquid crystal cell, and a common electrode. Typically, the pixel electrode is provided on a lower substrate for each liquid crystal cell, whereas the common electrode is integrally formed on the entire surface of an upper substrate. Each of the pixel electrodes is connected to a thin film transistor (TFT) used as a switching device. The pixel electrode drives the liquid crystal cell, along with the common electrode, in accordance with a data signal applied via the TFT.
FIG. 1 and FIG. 2 depict a conventional LCD device. As shown in FIG. 1, a lower substrate 1 of a LCD includes a TFT T arranged at an intersection between a data line 13 and a gate line 11, a pixel electrode 23 connected to a drain electrode 7 of the TFT, a data pad portion DP connected to the data line 13, and a gate pad portion GP connected to the gate line 11.
The TFT T includes a gate electrode 3 connected to the gate line 11, a source electrode 5 connected to the data line 13, and a drain electrode 7 connected, via a drain contact hole 19b, to the pixel electrode 23. Further, as shown in FIG. 2, the TFT T includes semiconductor layers 15 and 17 for defining a channel between the source electrode 5 and the drain electrode 7 by a gate voltage applied to the gate electrode 3. Such a TFT T responds to a gate signal from the gate line 11 to selectively apply a data signal from the data line 13 to the pixel electrode 23.
The pixel electrode 23 is positioned at a cell area divided by data line 13 and gate line 11 and is made from a transparent conductive material having a high light transmittance. The pixel electrode 23 is electrically connected to the drain electrode via the drain contact hole 19b. The pixel electrode 23 generates a potential difference from a common transparent electrode (not shown) provided at an upper substrate (not shown) by a data signal applied via the drain contact hole 19b. By this potential difference, a liquid crystal positioned between the lower substrate 1 and the upper substrate (not shown) is rotated due to its dielectric anisotropy. Thus, the liquid crystal allows a light applied from a light source to be transmitted into the upper substrate.
The gate pad portion GP applies a scanning signal, that is, a gaze pulse, from a gate driving integrated circuit (IC) (not shown) to the gate line 11. A gate pad terminal electrode 28 of the gate pad portion DP electrically contacts a gate pad 25 via a gate contact hole 19a. 
The data pad portion DP applies a data signal from a data driving integrated circuit IC (not shown) to the data line 13. A data pad terminal electrode 29 electrically contacts a data pad 27 via a data contact hole 19c. 
FIGS. 3A-3E depict a method of fabricating the LCD device having the above-mentioned configuration,
As shown in FIG. 3A, a gate metal layer is deposited onto the lower substrate 1, of the LCD device. Then, the gate metal layer was patterned to form a gate pad 25 and gate electrode 3. A gate insulating film 9 is formed entirely on the lower substrate 1, the gate pad 25 and the gate electrode 3, as shown in FIG. 3B. First and second semiconductor layers are deposited onto the gate insulating film 9 and then patterned to form an active layer 15 and an ohmic contact layer 17.
Subsequently, a data metal layer is deposited onto the gate insulating film 9 and then patterned to form the data pad 27, the source electrode 5 and the drain electrode 7, as shown in FIG. 3C. After patterning the source electrode 5 and the drain electrode 7, an ohmic contact layer 17 positioned on a portion of the active layer, which is above the gate electrode 3 is also patterned to expose the active layer 15. The exposed portion of the active layer 15 above the gate electrode 3 and between the source electrode 5 and the drain electrode 7 forms a channel 30.
As show, in FIG. 3D, an insulating material is deposited onto the gate insulating film 9 and patterned to form a protective layer 21. During the patterning, the data pad contact hole 19c and the drain contact hole 19b are defined to pass through the protective layer 21 and expose the data pad 27 and the drain electrode 7. Further, the gate pad contact hole 19a is defined to pass through the protective layer 21 and the gate insulating film 9 and expose the gate pad 25.
Subsequently, as shown in FIG. 3E, a transparent conductive material is deposited onto the protective layer 21 and patterned to form the pixel electrode 23, the gate pad terminal electrode 28 and the data pad terminal electrode 29. The pixel electrode 23 electrically contacts the drain electrode 7 via the drain contact hole 19b. The gate pad terminal electrode 28 electrically contacts the gate pad 25 via the gate contact hole 19a. The data pad terminal electrode 29 electrically contacts the data pad 27 via the data contact hole 19c. 
The data pad 27, the source electrode 5 and the drain electrode 7 provided on the lower substrate 1 of the LCD are formed from a data metal layer of chrome (Cr) or molybdenum (Mo), etc., which is a single layer. As shown in FIG. 4, as the LCD moves toward a relatively higher resolution device, the data metal layer is formed into first through third metal layers 6a, 6b and 6c and has a three-layer structure.
The first and third metal layers 6a and 6c are made from Mo, which is electrically stable for a transparent conductive material, while the second metal layer 6b is made from aluminum (Al) or an aluminum alloy. If such a data metal three-layer structure is patterned, by a wet etching technique, then the first and third metal layers 6a and 6c are likely to be ionized within an etchant liquid in comparison to the second metal layer 6b due to an electrode potential difference between the first and third metal layers 6a and 6c and the second metal layer 6b. For example, the first and third metal layers 6a and 6c are oxidized by the second metal layer 6b, and the second metal layer 6b is deoxidized by the first and third metal layers 6a and 6c. For this reason, since as shown in FIG. 5, the first and third metal layers 6a and 6c are more undercut than the second metal layer 6b, upon deposition of the protective layer 21 the second metal layer 6b having a good reactivity with respect to the active layer 15 collapses. Further, the collapsed active layer 15 and second metal layer 6b contact each other and increase a leakage current. Also, since a deposition process of the three-layered data metal layer has three steps, problems of process quality and increased manufacturing cost occur.